Cadence Design Systems Xcelium Apps improves verification performances for design teams

Cadence Design Systems announced Xcelium Apps, a portfolio of domain-specific technologies implemented natively on the Cadence Xcelium Logic Simulator kernel that enable automotive, mobile and hyperscale design teams to achieve the highest verification… Continue reading Cadence Design Systems Xcelium Apps improves verification performances for design teams

Cadence partners with Dassault Systèmes to accelerate system development process

Cadence Design Systems and Dassault Systèmes announced a strategic partnership to provide enterprise customers in multiple vertical markets, including high tech, transportation and mobility, industrial equipment, aerospace and defense, and healthcare, … Continue reading Cadence partners with Dassault Systèmes to accelerate system development process

Cadence DRAM verification solution optimizes SoC designs for data center and automotive applications

Cadence Design Systems announced a new DRAM verification solution, allowing customers to test and optimize system-on-chip (SoC) designs for data center, consumer, mobile and automotive applications. Using the full DRAM verification solution, which deli… Continue reading Cadence DRAM verification solution optimizes SoC designs for data center and automotive applications

Cadence Tensilica AI Platform accelerates intelligent SoC development

Cadence Design Systems unveiled its Tensilica AI Platform for accelerating AI SoC development, including three supporting product families optimized for varying data and on-device AI requirements. Spanning the low, mid and high end, the comprehensive C… Continue reading Cadence Tensilica AI Platform accelerates intelligent SoC development

62% of consumers believe hyperscale computing will have a positive impact over the next five years

A majority of consumers believe hyperconnectivity driven by hyperscale computing will positively impact them within five years, according to a report from Cadence Design Systems. The survey was conducted to determine consumer awareness and impressions … Continue reading 62% of consumers believe hyperscale computing will have a positive impact over the next five years

Cadence unveiled its third-generation 112G long-reach (112G-LR) SerDes IP on TSMC’s N5 process

Cadence Design Systems unveiled its third-generation 112G long-reach (112G-LR) SerDes IP on TSMC’s N5 process for hyperscale ASICs, artificial intelligence/machine learning (AI/ML) accelerators, and switch fabric systems on chip (SoCs). The Cadence 112… Continue reading Cadence unveiled its third-generation 112G long-reach (112G-LR) SerDes IP on TSMC’s N5 process

Elliptic Labs partners with Cadence to optimize ML algorithms on Cadence Tensilica HiFi DSPs

Elliptic Labs announced a collaboration with Cadence Design Systems to optimize its machine learning algorithms on Cadence Tensilica HiFi DSPs. Enabling Elliptic Labs to bring richer user experiences to end products while simultaneously reducing power … Continue reading Elliptic Labs partners with Cadence to optimize ML algorithms on Cadence Tensilica HiFi DSPs

Cadence System VIP: Automating SoC testbench assembly, bus and CPU traffic generation

Cadence Design Systems announced Cadence System-Level Verification IP (System VIP), a new suite of tools and libraries for automating system-on-chip (SoC) testbench assembly, bus and CPU traffic generation, cache-coherency validation and system perform… Continue reading Cadence System VIP: Automating SoC testbench assembly, bus and CPU traffic generation