Collaborate Disseminate
Modern smartphones try and provide a number of useful features to their users, and yet, they’re not exactly designed with human needs in mind. A store-bought smartphone will force a …read more Continue reading MikroPhone – Open, Secure, Simple Smartphone
There’s an understandably high level of interest in RISC-V processors among our community, but while we’ve devoured the various microcontroller offerings containing the open-source core it’s fair to say we’re …read more Continue reading Will We Soon Be Running Linux On SiFive Cores Made By Intel?
SiFive, the leading provider of commercial RISC-V processor IP and silicon solutions, announced that Shubham “Sam” Maheshwari has joined the company as Chief Financial Officer (CFO). Maheshwari will lead SiFive financial operations to enable sustainabl… Continue reading Shubham “Sam” Maheshwari joins SiFive as Chief Financial Officer
The 2019 Hackaday Superconference kicked off with a marvelous, and marvelously geeky, keynote talk on the subject of RISC-V by Dr. Megan Wachs. She is VP of Engineering at SiFive, a company that makes RISC-V processors in silicon, but the talk is a much more general introduction to the RISC-V …read more
Continue reading Supercon Keynote: Megan Wachs Breaks Down RISC-V
If you want to talk about RISC-V, the Open Source instruction set for CPUs, you’re probably talking about microcontrollers. You can buy small but powerful RISC-V micros on par with an ARM Cortex-M4 right now. Deep in the pipeline are cores for something resembling SoCs, the kind you’d find in desktop NAS solutions, maybe a few routers, and smart TVs. This is great and all, but our idea of a ‘computer’ is still a desktop. When is the Open instruction set desktop coming? Well, it’s here right now. [Andrew Back] built a RISC-V desktop computer. It runs Linux, it comes …read more
Today, SiFive has released two new cores designed for the lower end of computing. This adds to the company’s existing portfolio of microcontrollers and SoCs based on the Open RISC-V ISA. Over the last two years, SiFive has introduced a number of cores based on the RISC-V ISA, an Open Architecture ISA that gives anyone to design and develop a microcontroller or microprocessor platform. These two new cores fill out the low-power end of SiFive’s core portfolio.
The two new cores included in the announcement are the SiFive E20 and E21, both meant for low-power applications, and according to SiFive …read more
Continue reading SiFive Releases Smaller, Lower Power RISC-V Cores
SiFive raised $50 Million in funding. SiFive is a semiconductor working on two fronts: they want to democratize silicon prototyping, and they’re the people making the HiFive series of microcontrollers and SoCs. The HiFives are built on the RISC-V instruction set, a Big-O Open instruction set for everything from tiny microcontrollers to server CPUs. With RISC-V, you’re not tied to licensing from ARM or their ilk. Recently SiFive introduced an SoC capable of running Linux, and the HiFive 1 is a very fast, very capable microcontroller that’s making inroads with Nvidia and Western Digital. The new round of funding is …read more
Slowly but surely, RISC-V, the Open Source architecture for everything from microcontrollers to server CPUs is making inroads in the community. Now SiFive, the major company behind putting RISC-V chips into actual silicon, is releasing a chip that’s even more powerful. At FOSDEM this weekend, SiFive announced the release of a Linux-capable Single Board Computer built around the RISC-V ISA. It’s called the HiFive Unleashed, and it’s the first piece of silicon capable or running Linux on a RISC-V core.
The HiFive Unleashed is built around the Freedom U540 SOC, a quad-core processor built on a 28nm process. The chip …read more
Continue reading SiFive Introduces RISC-V Linux-Capable Multicore Processor
Athe the Linley Processor Conference today, SiFive, the semiconductor company building chips around the Open RISC-V instruction set has announced the availability of a quadcore processor that runs Linux. We’ve seen RISC-V implementations before, and SiFive has already released silicon-based on the RISC-V ISA. These implementations are rather small, though, and this is the first implementation designed for more than simple embedded devices.
This announcement introduces the SiFive U54-MC Coreplex, a true System on Chip that includes four 64-bit CPUs running at 1.5 GHz. This SoC is built with TSMC’s 28 nm process, and fits on a die about 30 …read more
This weekend at the Bay Area Maker Faire, Arduino in conjunction with SiFive, a fabless provider of the Open Source RISC-V micros, introduced the Arduino Cinque. This is a board running one of the fastest microcontrollers available, and as an added bonus, this board includes Espressif’s ESP32, another wonderchip that features WiFi and Bluetooth alongside a very, very powerful SoC.
Details on the Arduino Cinque are slim at the moment, but from what we’ve seen so far, the Cinque is an impressively powerful board featuring the RISC-V FE310 SoC from SiFive, an ESP32, and an STM32F103. The STM32 appears to …read more
Continue reading Arduino Cinque – The RISC-V, ESP32, WiFi, Bluetooth Arduino
